Raytheon Senior FPGA Engineer (G09) in Salt Lake City, Utah

Raytheon Applied Signal Technology is a diversified intelligence and defense company that develops systems to provide integrated sensor and signal processing products in support of intelligence, surveillance, and reconnaissance. Our Engineering team in the Salt Lake City, UT office has a need for a senior-level FPGA engineer to design, build, and maintain advanced high-capacity systems that process modern high-speed communications for the US intelligence community. As a task lead and technical contributor, he/she will work with other FPGA engineers as well as system and embedded software engineers to provide cutting-edge products and services for the protection of our country. The successful candidate will: · Have a solid understanding of FPGA development processes and FPGA digital design practices · Have some background knowledge in signal processing and/or network communications · Have experience with implementation of signal processing and/or communications algorithms in FPGA environments · Be capable of translating functional requirements into efficient working designs. · Apply strong task planning and management skills to lead a team of engineers to execute development efforts to meet technical, schedule, budget and quality requirements · Have strong written and verbal communication skills and the ability to work independently, yet collaboratively, in multidisciplinary team environments. · Utilize technical expertise to provide imaginative, thorough, practicable, and organizationally aligned solutions to a wide range of difficult FPGA developmental challenges. · Be comfortable with the application of technical theories and concepts in developmental environments and have some level of general knowledge of other related disciplines. Required Skills: · Minimum of 6 years of FPGA related development experience · Strong comprehension of FPGA development environments and FPGA development tool flows · Strong working knowledge of VHDL, Verilog, and/or SystemVerilog HDL languages · Proven ability to design, implement, and document FPGA designs from component level specifications · Proven ability to define and perform FPGA component level integration and test plans · Proven ability to resolve FPGA integration and test issues in hands-on lab environments · Experience providing reliable FPGA cost/schedule estimates for developmental activities · Experience in leading a team of 2-5 FPGA engineers and/or other technical staff in design, implementation, integration and test activities; includes planning, estimating and managing execution to meet schedule and cost targets · Clear written and verbal communication skills · Ability to work independently and collaboratively in team environments Active Secret Security clearance, with the ability to obtain a TS/SCI U.S. Citizenship status is required as this position needs an active U.S. Security Clearance as of day one of employment Desired Skills: · Background in digital signal processing and/or network processing FPGA applications · Familiarity with high-level FPGA HDL code generation tool flows (Matlab, Simulink, C/C++) · Familiarity with circuit card design, implementation, integration, and test · TS/SCI Clearance (Active within the last 24 months) Required Education: BS Electrical Engineering or equivalent Desired Education: MS in Electrical Engineering or equivalent This position requires a U.S. person or the ability to obtain an Export Authorization from the appropriate government agency for non-U.S. persons. 99064